[Kernel]
Device Drivers  --->
    Character devices  --->
        <*> Ralink I2S Support
        [*]   Ralink SoC as I2S Master Device
       
[User]
Ralink Proprietary Application  --->       
    [*] I2S Command

1. 將 module PIN 38(I2S_MCLK) 設定為 I2S MCLK
# reg s 0
# reg r 60   --> (讀出原來的值, 例: 0x14171c)
# reg w 60 0x34171c   --> (將 Bits 22:21 改為1, 即 34171c)

2. 將MCLK 頻率設為 12MHz
# reg r 2c  --> (讀出原來的值, 例: 0x40200000)
# reg w 2c 0x40200200  --> (將 Bits 11:9 改為1, 即 40200200 ,  )


說明:
參考MT7620_ProgrammingGuide_E1_20120522.pdf

p.35 --> 21. GPIOMODE: GPIO Purpose Select (offset: 0x0060)
Offset: 0x60 
Bits 22:21
0: WDT_RST_N(normal mode)
1: REFCLK0_OUT
2: GPIO mode
3: Reserved

p.22 --> 11. CLKCFG0: Clock Configuration Register 0 (offset: 0x002C)
Offset: 0x2c
Bits 11:9
0: Xtal clock 20/40 MHz
1: 12 MHz
2: 25 MHz
3: 40 MHz
4: 48 MHz
5: Internal Fraction-N_CLK/2
6: Reserved
7: CPLL_DIV8